Microsoft and TSMC announce Joint Innovation Lab to accelerate silicon design on Azure

Right now, every industry and every customer is going through a massive transformation, and cloud computing is often a central enabler of this. The silicon industry is also experiencing change as a critical part of the fast-growing cloud computing ecosystem—an ecosystem where silicon and chip design workloads must meet the rising bar for performance, complexity, and perceived costs. In Azure, we focus on the needs of the semiconductor design industry, so we can solve problems and provide solutions for our customers. With our partners at TSMC, we share the belief that using the cloud for silicon design will be a competitive advantage for those that embrace it. 

Through our deep partnership, we have worked closely to implement an Azure-based architecture for TSMC’s Virtual Design Environment, refined cloud resource selection and storage architectures for specific workloads, and demonstrated cost versus performance optimizations for scalable workloads. This requires both new virtual machine (VM) types most suitable for EDA (Electronics Design Automation) workloads, and a cloud-optimized design solution that fully utilizes EDA parallelism. Starting from our collaboration with TSMC and its EDA ecosystem partners, we have jointly achieved multiple breakthroughs in both areas.

Microsoft and TSMC support cloud adoption in the silicon industry

To continue this momentum, Microsoft launches the Joint Innovation Lab with TSMC to serve as a collaboration platform to best integrate cloud and EDA innovations, and help provide the semiconductor industry with the performance and cost effectiveness to accelerate time-to-market and optimize development cost to unleash product innovations.

“Nurturing ecosystem collaboration has been the core of TSMC Open Innovation Platform® (OIP), and this Joint Innovation Lab with Microsoft is one big step forward elevating cross-industry partnership to the next level. TSMC has been one of the earliest drivers of cloud to speed up design enablement for customers since 2018. Through our collaboration with Cloud Alliance members, we can lower entry barriers of Cloud adoption for our common customers and help customers conduct IC design securely in the Cloud and achieve faster time-to-market. Microsoft has been a great partner, and its Silicon on Azure team shares a similar vision with us.” – Dr. Cliff Hou, Senior Vice President of Technology Development at TSMC

Security is foundational for Azure, and we are one of the first cloud service providers certified by TSMC. In addition to our investments of over $1 billion a year on cybersecurity and over 3,500 engineers dedicated to security, we continue to focus on the needs of the semiconductor industry to protect their intellectual property. Building on top of the security foundation, the Joint Innovation Lab aims at hosting in-depth collaborations among ecosystem partners to drive new solutions and transform IC design in the Cloud:

• Next-generation VM types: We are working to optimize new VM types in all aspects of CPU performance, number of cores, memory-to-core ratio, and local storage, combined with the most effective storage options, targeting EDA workloads of highly complicated IC designs enabled by the most advanced process technologies.
• Cloud-optimized EDA solutions: We are working to create cloud-optimized design solutions, tools, and methodologies combined, to fully utilize EDA parallelism. With massive computational power in the cloud lifting in-house compute limitation, it opens up a brand-new category of EDA optimization to fully explore parallelism opportunities.

TSMC and Microsoft have worked together since 2018 when TSMC announced its OIP Cloud Alliance and OIP Virtual Design Environment (OIP VDE), to enable cloud-powered silicon design approaches using Azure that have demonstrated significant design cycle improvements. Using the vast computational power of Azure services and TSMC’s silicon expertise, we have been able to optimize production runs around the world. It is not uncommon for EDA design jobs to take months due to in-house compute limitations. With access to Azure’s burstable resources to scale to tens of thousands of cores quickly, silicon designers are now able to achieve much faster time to market with improved efficiencies while dealing with their surge demand.

The Silicon on Azure team, led by Mujtaba Hamid, has always taken a broad industry approach to silicon design on Azure, and both our teams are committed to sharing what we learn with the semiconductor design community. Most recently, our collaboration led to two technical whitepapers available through TSMC-Online, outlining optimal cloud usage to speed up mission-critical timing sign-off jobs in a big way, while achieving cost optimization at the same time.

I am very excited about the Joint Lab effort and look forward to jointly engaging with all our partners. Stay tuned for more details and announcements coming out of this collaboration.

For further details on running silicon workloads on Azure, visit our Azure high-performance computing (HPC) for silicon page. To contact the team, please email Azure for Silicon. 

Source: Azure Blog Feed